1. Field of the Invention
The present invention relates to an overvoltage protecting circuit incorporated in a semiconductor integrated circuit and, more particularly, to an overvoltage protecting circuit used for preventing a load damp of a vehicle battery.
2. Description of the Related Art
FIG. 1 is a circuit diagram showing a conventional overvoltage protecting circuit. For example, in a semiconductor integrated circuit used on a vehicle and receiving a power supply voltage from a vehicle battery, an overvoltage protecting circuit is incorporated for protecting an internal circuit upon an increase in battery voltage above a predetermined value by a surge or the like, i.e., for preventing a load damp. A semiconductor integrated circuit 30 shown in FIG. 1 incorporates an overvoltage protecting circuit 32 for protecting an internal circuit 31. A V.sub.CC power supply terminal 33 is connected to a vehicle battery 35 by a wiring 34 through a protective resistor R.sub.D. The internal circuit 31 is arranged to be operated within a rated voltage. In the overvoltage protecting circuit 32, a collector-emitter path of a voltage clamping npn transistor Q is connected between the V.sub.CC power supply terminal 33 and a ground potential (GND) terminal 36.
A plurality of Zener diodes D.sub.Z for generating a predetermined clamping voltage are connected in series between the V.sub.CC power supply terminal 33 and the base of the npn transistor Q in a backward direction.
FIG. 2 is a characteristic curve showing a relationship between a collector-emitter voltage V.sub.CE and a collector current I.sub.C of the npn transistor Q in an overvoltage protecting operation. A hatched area below a broken line is a safe operating area (SOA) of the voltage clamping transistor Q.
An operation of the overvoltage protecting circuit shown in FIG. 1 will be described hereinafter.
When a voltage of the battery 35 is increased, a current in a backward direction flows into the Zener diodes D.sub.Z to turn on the npn transistor Q. As a result, a potential of the V.sub.CC power supply terminal 33 is kept at the sum (rated voltage Vl) of a base-emitter voltage V.sub.F of the npn transistor Q and the sum VZ of voltages of a plurality of Zener diodes D.sub.Z. Therefore, the internal circuit 31 is protected from the overvoltage.
Upon the overvoltage protection, however, even if the voltage (the collector-emitter voltage V.sub.CE of the npn transistor Q here) between the V.sub.CC power supply terminal 33 and the ground terminal 36 is clamped to the rated voltage V.sub.1, when a collector current I.sub.C of the npn transistor Q necessary for this clamping is increased, the collector current I.sub.C rises above the safe operating area of the voltage clamping transistor Q shown by the broken line if the current I.sub.C is increased beyond a predetermined value Il (point A in FIG. 2), so that the voltage clamping transistor Q may be damaged or reliability may be degraded. On the other hand, it is uneconomical that the voltage clamping transistor Q is made in a large size to ensure the reliability.